MSparc: A Multithreaded Sparc

MSparc: Multithreading in Real-Time Architectures

This paper presents the use of multithreaded processors in real-time architectures. In particular we will handle real-time applications with hard timing constraints. In our approach, events (e.g. timer interrupts, signals from the environment, etc) are distinguished into three classes according to the reaction times that have to be met. Since two of these classes are well known in real-time sys...

An FPGA Host-Multithreaded Functional Model for SPARC v8

Formal Reasoning about Hardware and Software Memory Models

The Java programming language allows multithreaded programming, where threads can be run on multiprocessor or uniprocessor platforms. The allowed behaviors of any multithreaded Java program on any implementation platform (multior uni-processor), are described in terms of a memory consistency model called the Java Memory Model (JMM). However, shared memory multiprocessors have a memory model of ...

A Characterization of the SPARC T3-4 System

This technical report covers a set of experiments on the 64-core SPARC T3-4 system, comparing it to two similar AMD and Intel systems. Key characteristics as maximum integer and floating point arithmetic throughput are measured as well as memory throughput, showing the scalability of the SPARC T3-4 system. The performance of POSIX threads primitives is characterized and compared in detail, such...

The Study of Transient Faults Propagation in Multithread Applications

Whereas contemporary Error Correcting Codes (ECC) designs occupy a significant fraction of total die area in chipmultiprocessors (CMPs), approaches to deal with the vulnerability increase of CMP architecture against Single Event Upsets (SEUs) and Multi-Bit Upsets (MBUs) are sought. In this paper, we focus on reliability assessment of multithreaded applications running on CMPs to propose an adap...